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SCA103T series murata electronic s oy subject to changes 1 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 the SCA103T differen tial inclinometer se ries the SCA103T series is a 3d - mems - based single axis inclinometer family that uses the differential measurement principle. the high calibration accuracy combines extremely low temperature dependency, high resolution and low noise together with a robust sensing element design, to make the SCA103T an ideal choice for high accura cy leveling instruments. the murata inclinometers are insensitive to vibration due to having over damped sensing elements plus t hey can withstand mechanical shocks of 20000 g. features ? ? ? ? ? ? ? ? ? ? o true self test by deflecting the sensing elements proof mass by electrostatic force. o continuous sensing element interconnection failure check. o continuous memory parity check. ? ? applications ? ? ? ? figure 1. functional block diagram data s heet self test 2 sensing element 1 sensing element 2 spi interface self test 1 signal conditioning and filtering a/d conversion signal conditioning and filtering eeprom calibration memory 9 st_2 10 st_1 12 vdd 6 gnd 11 out_1 5 out_2 1 sck 3 miso 4 mosi 7 csb temperature sensor free datasheet http:///
SCA103T series murata electronic s oy subject to changes 2 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 table of contents the SCA103T differential inclinomete r series ................................ ................................ ....... 1 features ................................ ................................ ................................ ................................ ............. 1 applications ................................ ................................ ................................ ................................ ...... 1 table of contents ................................ ................................ ................................ ...................... 2 1 electrical specifications ................................ ................................ ................................ ..... 3 1.1 absolute maximu m ratings ................................ ................................ ................................ ... 3 1.2 performance characteristics ................................ ................................ ................................ .. 3 1.3 electrical characteristics ................................ ................................ ................................ ....... 4 1.4 spi interface dc characteristics ................................ ................................ ............................ 4 1.5 spi interface ac characteristics ................................ ................................ ............................ 4 1.6 spi interface timing specifications ................................ ................................ ....................... 5 1.7 electrical connection ................................ ................................ ................................ .............. 6 1.8 typical performance characteristics ................................ ................................ .................... 6 1.8 .1 additional external compensation ................................ ................................ ...................... 7 2 functional description ................................ ................................ ................................ ....... 8 2.1 differential measurement ................................ ................................ ................................ ....... 8 2.2 voltage to angle conversion ................................ ................................ ................................ . 9 2.3 ra tiometric output ................................ ................................ ................................ ................ 10 2.4 spi serial interface ................................ ................................ ................................ ................ 10 2.5 digital output to angle conversion ................................ ................................ ..................... 12 2.6 self test and failure detection modes ................................ ................................ ................ 13 2 .7 temperature measurement ................................ ................................ ................................ .. 14 3 application information ................................ ................................ ................................ .... 15 3.1 recommended circuit diagrams and printed circuit board layouts ............................... 15 3.2 recommended printed circuit board footprint ................................ ................................ . 16 4 mechanical specifications and reflow soldering ................................ .......................... 16 4.1 mechanical specifications (reference only) ................................ ................................ ....... 16 4.2 reflow soldering ................................ ................................ ................................ ................... 17 free datasheet http:///
SCA103T series murata electronic s oy subject to changes 3 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 1 electrical s pecifications the SCA103T product family consists of two versions, the SCA103T - d04 and the SCA103T - d05, that differ in measurement range. the specific performance specifications related to each version are listed in the table SCA103T p erformance characteristics below. all other specifications are common to both versions. the supply voltage is vdd=5.00v and ambient temperature unless otherwise specified. parameters marked as d are valid when measured in differential mode using an ext ernal differential amplifier. parameters marked with s are for a single measurement channel. the performance of the selected amplifier may have an effect on some parameters. the differential signal is determined as out_diff = out1 C out2. 1.1 absolute maximu m r atings supply voltage (v dd ) voltage at input / output pins storage temperature operating temperature mechanical shock - 0.3 v to +5.5v - 0.3v to (v dd + 0.3v) - 55c to +125c - 40c to +125c drop from 1 met e r onto a concrete surface (20000g). powere d or non - powered 1.2 performance c haracteristics parameter d/s condition SCA103T - d04 SCA103T - d05 units measuring range d nominal 15 0.26 30 0.5 g frequency response s C 3db lp (1 8 - 28 8 - 28 hz offset (output at 0g) s ratiometric output vdd/2 vdd/2 v offset calibration error s 0.057 0.11 offset digital output s 1024 1024 lsb sensitivity d between 01 ( 2 16 280 8 140 v/g mv/ sensitivity calibration error s 0.5 0.5 % sensitivity digital output d 6554 3277 lsb / g offset temperatur e dependency d - 2585c (typical) 0.002 0.002 /c - 40125c (max) 0.29 0.29 sensitivity temperature dependency d - 25...85c (typical) 0.013 0.013 %/c - 40125c (max) - 2.5...+1 - 2.5...+1 % typical non - linearity d measuring range 0.057 0.11 digital output resolution d between 01 ( 2 12 0.009 12 0.017 bits / lsb output noise density d from dc...100hz 0.0004 0.0004 analog output r esolution d bandwidth 10 hz ( 3 0.001 3 0.001 3 cross - axis sensitivity s max . 4 4 % ratiometric error s vdd = 4.75...5.25v 1 1 % note 1. the frequency response is determined by the sensing elements internal gas damping. note 2. the angle output has sin curve relationship to voltage output - refer to chapter 2.2 note 3. resolution = noise density * (bandwidth) hz / ? free datasheet http:///
SCA103T series murata electronic s oy subject to changes 4 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 1.3 electrical c haracteristics parameter condition min. typ max. units supply voltage vdd 4.75 5.0 5.25 v current consumption vdd = 5 v; no load 4 5 ma operating temperat ure - 40 +125 c analog resistive output load vout to vdd or gnd 10 kohm analog capacitive output load vout to vdd or gnd 20 nf start - up delay reset and parity check 10 ms 1.4 spi interface dc c haracteristics parameter conditions symbol min typ ma x unit input terminal csb pull up current v in = 0 v i pu 13 22 35 ? a input high voltage v ih 4 vdd+0.3 v input low voltage v il - 0.3 1 v hysteresis v hyst 0.23*vdd v input capacitance c in 2 pf input terminal mosi, sck pull down current v in = 5 v i pd 9 17 29 ? a input high voltage v ih 4 vdd+0.3 v input low voltage v il - 0.3 1 v hysteresis v hyst 0.23*vdd v input capacitance c in 2 pf output terminal miso output high voltage i > - 1ma v oh vdd - 0.5 v output low voltage i < 1 ma v ol 0.5 v tristate leakage 0 < v miso < vdd i leak 5 100 pa 1.5 spi interface ac c haracteristics parameter condition min. typ. max. units output load @500khz 1 nf spi clock frequency 500 khz internal a/d conversion time 150 ? s data transfer time @5 00khz 38 ? s free datasheet http:///
SCA103T series murata electronic s oy subject to changes 5 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 1.6 spi interface timing s pecifications parameter conditions symbol min. typ. max. unit terminal csb, sck time from csb (10%) to sck (90%) t ls1 120 ns time from sck (10%) to csb (90%) t ls2 120 ns terminal sck sck low time load c apacitance at miso < 2 nf t cl 1 ? s sck high time load capacitance at miso < 2 nf t ch 1 ? s terminal mosi, sck time from changing mosi (10%, 90%) to sck (90%). data setup time t set 30 ns time from sck (90%) to changing mosi (10%,90%). data hold time t hol 30 ns terminal miso, csb time from csb (10%) to stable miso (10%, 90%). load capacitance at miso < 15 pf t val1 10 100 ns time from csb (90%) to high impedance state of miso. load capacitance at miso < 15 pf t lz 10 100 ns terminal miso, sck time from sck (10%) to stable miso (10%, 90%). load capacitance at miso < 15 pf t val2 100 ns terminal csb time between spi cycles, csb at high level (90%) t lh 15 ? s when using spi commands rdax, rday, rwtr: time between spi cycles, csb at hig h level (90%) tlh 150 ? s figure 2. timing diagram for spi communication csb sck mosi miso t ls1 t ch t hol t set t val1 t val2 t lz t ls2 t lh msb in msb out lsb in lsb out data out data in t cl free datasheet http:///
SCA103T series murata electronic s oy subject to changes 6 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 1.7 e lectrical c onnection if the spi interface is not used sck (pin1), miso (pin3), mosi (pin4) and csb (pin7) must be left floating. self - test can be activated applying logic 1 (positive supply voltage level) to st_1 or st_2 pins (pins 10 or 9). self - test must not be activated for both channels at the same time. if the st feature is not used, pins 9 and 10 must be left floating or connected to gnd. inclination signals are prov ided from pins out_1 and out_2. figure 3. SCA103T electrical connection no. node i/o description 1 sck input serial clock 2 nc input no connect, left floating 3 miso output master in slave out; data output 4 mosi input master out slave in; data input 5 out_2 output output 2 (ch 2) 6 gnd supply ground 7 csb input chip select (active low) 8 nc input no connect, left floating 9 st_2 input self test input for ch 2 10 st_1 input self test input for ch 1 11 out_1 outp ut output 1(ch 1) 12 vdd supply positive supply voltage (+5v dc) 1.8 typical performance c haracteristics typical offset and sensitivity temperature dependencies of SCA103T are presented in following diagrams. these results represent the typical performance of SCA103T components. the mean value and 3 sigma limits (mean 3 ? standard deviation) and specification limits are presented in following diagrams. the 3 sigma limits represents 99.73% of the SCA103T population. sck miso mosi out_2 gnd vdd out_1 st_1 st_2 csb 1 2 3 4 5 6 7 8 9 10 11 12 sck ext_c_1 miso mosi out_2 vss csb ext_c_2 st_2 st_1/test_in out_1 vdd free datasheet http:///
SCA103T series murata electronic s oy subject to changes 7 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 figure 4. typical temperature de pendency of SCA103T offset figure 5. typical temperature dependency of SCA103T sensitivity 1.8.1 additional external c ompensation to achieve the best possible accuracy, the temperature measurement information and typical temperature dependency curve can be used for SCA103T sensitivity temperature dependency compensation. the offset temperature dependency curves do not have any significant tendency so there is no need for any additional external compensation for offset. by using an additional 3rd order polynome compensation curve based on average sensitivity temperature dependency curve and temperature measurement information, it is possible to reduce sensitivity temperature dependency from 0.013%/c down to 0.005%/c. the equation for the fitted 3 rd o rder polynome curve is: where: scorr: 3 rd order polynome fitted to average sensitivity temperature dependency curve t temperature in c (refer to paragraph 2.7 - temperature m easurement ) 031 . 0 * 0032 . 0 * 00005 . 0 * 0000005 . 0 2 3 ? ? ? ? ? t t t scorr temperature dependency of SCA103T offset (differential output) -0.3 -0.2 -0.1 0 0.1 0.2 0.3 -40 -20 0 20 40 60 80 100 120 tem p [c] differential offset error [degrees] average +3 sigma -3 sigma specification limit specification limit tem perature dependency of SCA103T sensitivity [%] (differential output) -3 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 -40 -20 0 20 40 60 80 100 120 tem p [c] differential sensitivity error [%] average +3 sigma -3 sigma specification limit specification limit free datasheet http:///
SCA103T series murata electronic s oy subject to changes 8 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 the calculated compensation curve can be used to compensate for the temperature dependency of the SCA103T sensitivity by using following equation: where: senscomp temperature compensated sensitivity sens nominal sensitivity (16 v/g SCA103T - d04, 8v/g SCA103T - d05) the typical sensitivity temperature dependency after 3rd order compensation is shown in the figure below. figure 6. the temperature dependency of 3 rd order compensated SCA103T sensitivity 2 functional descript ion 2.1 differential m easurement the measuring axis of SCA103T sensing elements are mutually opposite in direction, thus providing two inclination signals which can be differentiated externally, either by using a differential amplifier or a microcontroller. the differential measurement principle removes all common mode measurement errors. most of the error sources have similar effects on both sensing elements. these errors are removed from measurement result during signal differentiation. the differential mea surement principle gives very efficient noise reduction, improved long term stability and extremely low temperature dependency. ) 100 / 1 ( * scorr sens senscomp ? ? the temperature dependency of 3rd order compensated SCA103T sensitivity [%] (differential output) -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 -40 -20 0 20 40 60 80 tem p [c] differential sensitivity error [%] compensated average +3 sigma limit -3 sigma limit free datasheet http:///
SCA103T series murata electronic s oy subject to changes 9 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 typical output characteristics (channels 1, 2 and differential output: out1 - out2) are presented in the figure below. for diffe rential amplifier connection refer to the recommended circuit diagram. figure 7. differential output characteristics 2.2 voltage to angle c onversion the analog output behavior of the SCA103T is described in the figure below. the arrow represents t he measuring axis direction marking on the top of SCA103T package. figure 8. behavior of the analog output the analog output can be transferred to angle by using the following equation for conversion: whe re offset is the output of the device at 0 inclination position, sensitivity is the sensitivity of the device and v dout is the output of differential amplifier. in the case of differential amplifier connection shown in the chapter recommended circuit dia gram the nominal offset output is 0 v and the sensitivity is 16 v/g with SCA103T - d04 and 8 v/g with SCA103T - d05. out1 < out1 =2.5v < out1 out2 > out2 =2.5v > out2 diff < diff =0 v SCA103T-d04 outputs and differential amplifier output -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 -20 -15 -10 -5 0 5 10 15 20 tilt angle [ ] output [v] SCA103T out_1 SCA103T out_2 differential output ? ? ? ? ? ? ? ? ? ? y sensitivit offset v dout arcsin ? free datasheet http:///
SCA103T series murata electronic s oy subject to changes 10 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 angles close to 0 inclination can be estimated quite accurately with straight line conversion but for best possible accuracy arcsine convers ion is recommended to be used. following table shows the angle measurement error if straight line conversion is used. straight line conversion equation: where: sensitivity = 280mv/ with SCA103T - d04 or sensitivity= 140mv/ with SCA103T - d05 tilt a ngle [ ] s traight line conversion error [ ] 0 0 1 0.0027 2 0.0058 3 0.0094 4 0.0140 5 0.0198 10 0.0787 15 0.2185 30 1.668 2.3 ratiometric o utput ratiometric output means that the zero offset point and sensitivity of the sensor are proportional to the supply voltage. if the SCA103T supply voltage is fluctuating, the SCA103T output will also vary. when the same reference voltage for both the SCA103T sensor and the measuring part (a/d - converter) is used, the error caused by reference voltage variation is automatically compensated. 2.4 spi serial i nterface a serial peripheral interface (spi) system consists of one master device and one or more slave devices. the master is defined as a microcontroller providing the spi clock and the slave as any integrated circuit receiving the spi clock from the master. the asic in murata electronics products always operates as a slave device in master - slave operation mode. the spi has a 4 - wire synchronous serial interface. data communication is enabled with a low active slave select or chip select wire (csb). data is transmitted by a 3 - wire interface consisting of wires for serial data input (mosi), serial data output (miso) and serial clock (sck). figure 9. typical spi connection y sensitivit offset v dout ? ? ? data out (mosi) data in (miso) serial clock (sck) ss0 ss1 ss2 ss3 master microcontroller si so sck cs slave si so sck cs si so sck cs si so sck cs free datasheet http:///
SCA103T series murata electronic s oy subject to changes 11 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 the spi interfa ce in murata products is designed to support any micro controller that uses spi bus. communication can be carried out by software or hardware based spi. please note that in the case of hardware based spi, the received acceleration data is 11 bits. the data transfer uses the following 4 - wire interface: mosi master out slave in p SCA103T miso master in slave out SCA103T p sck serial clock p SCA103T csb chip select (low active) p SCA103T each transmission starts with a falling edge of csb and ends with the rising edge. during transmission, commands and data are controlled by sck and csb according to the following rules: ? commands and data are shifted; msb first, lsb last ? each output data/status bits are shifted out on the falling edge o f sck (miso line) ? each bit is sampled on the rising edge of sck (mosi line) ? after the device is selected with the falling edge of csb, an 8 - bit command is received. the command defines the operations to be performed ? the rising edge of csb ends all data tra nsfer and resets internal counter and command register ? if an invalid command is received, no data is shifted into the chip and the miso remains in high impedance state until the falling edge of csb. this reinitializes the serial communication. ? data transfe r to mosi continues immediately after receiving the command in all cases where data is to be written to SCA103Ts internal registers ? data transfer out from miso starts with the falling edge of sck immediately after the last bit of the spi command is sample d in on the rising edge of sck ? maximum spi clock frequency is 500khz ? maximum data transfer speed for rdax and rday is 5300 samples per sec / channel spi command can be either an individual command or a combination of command and data. in the case of comb ined command and data, the input data follows uninterruptedly the spi command and the output data is shifted out in parallel with the input data . the spi interface uses an 8 - bit instruction (or command) register. the list of commands is given in table bel ow. command name command format description: meas 00000000 measure mode (normal operation mode after power on) rwtr 00001000 read temperature data register stx 00001110 activate self test for x - channel sty 00001111 activate self test for y - channel r dax 00010000 read x - channel acceleration rday 00010001 read y - channel acceleration measure mode (meas) is the standard operation mode after power - up. during normal operation, meas command is the exit command from self test. read temperature data regist er (rwtr) reads the temperature data register during normal operation without effecting the operation. temperature data register is updated every 150 s. the load operation is disabled whenever the csb signal is low, hence csb must stay high at least 150 s prior to the rwtr command in order to guarantee correct data. the data transfer is presented in figure 10 below. the data is transferred msb first. in normal operation, it does not matter what data is written into temperature data register during the rwt r command and hence writing all zeros is recommended. free datasheet http:///
SCA103T series murata electronic s oy subject to changes 12 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 figure 10. command and 8 bit temperature data transmission over the spi self test for x - channel (stx) activates the self test function for the x - channel (channel 1). the internal charge pump is activated and a high voltage is applied to the x - channel acceleration sensor element electrode. this causes the electrostatic force that deflects the beam of the sensing element and simulates the acceleration to the positive direction. the self - tes t is de - activated by giving the meas command. the self test function must not be activated for both channels at the same time. self test for y - channel (sty) activates the self test function for the y - channel (channel 2). the internal charge pump is activa ted and a high voltage is applied to the y - channel acceleration sensor element electrode. read x - channel acceleration (rdax) accesses the ad converted x - channel (channel 1) acceleration signal stored in acceleration data register x. read y - channel acce leration (rday) accesses the ad converted y - channel (channel 2) acceleration signal stored in acceleration data register y. during normal operation, acceleration data registers are reloaded every 150 s. the load operation is disabled whenever the csb si gnal is low, hence csb must stay high at least 150 s prior to the rdax command in order to guarantee correct data. data output is an 11 - bit digital word that is fed out msb first and lsb last. figure 11. command and 11 bit acceleration data transmission over the spi 2.5 digital o utput to angle c onversion the acceleration measurement results in rdax and rday data registers are in 11 bit digital word format. the data range is from 0 to 2048. the nominal content of rdax and rday data registers in zero angle position are: binary: 100 0000 0000 decimal: 1024 free datasheet http:///
SCA103T series murata electronic s oy subject to changes 13 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 to obtain the differential digital output value, dout, rday must be subtracted from rdax. dout = rdax C rday the transfer function from differential digital output to angle can be presented a s where; d out differential digital output ( rdax C rday) d out@0 digital offset value, nominal value = 0 in differential mode ? angle sens sensitivity of the device . (SCA103T - d04: 6554, SCA103T - d05: 3277) as an example, the f ollowing table contains SCA103T - d04 data register values and calculated differential digital output values with - 5, - 1 0, 1 and 5 degree tilt angles. angle [] acceleration [mg] rdax rday dout (rdax C 2.6 s elf test and failure detection m odes to ensure reliable measurement results, the SCA103T has continuous interconnection failure and calibration memory validity detection. a dete cted failure forces the output signal close to power supply ground or vdd level, outside the normal output range. the normal output ranges are: analog 0.25 - 4.75 v (@vdd=5v) and spi 102...1945 counts. the calibration memory validity is verified by continuo usly running parity checks for the control register memory content. in a case where a parity error is detected the control register is automatically re - loaded from the eeprom. if a new parity error is detected after re - loading data both analog output volta ges are forced to go close to ground level (<0.25 v) and spi outputs goes below 102 counts. the SCA103T also includes a separate self test mode. the true self test simulates acceleration, or deceleration, using an electrostatic force. the electrostatic f orce simulates acceleration that is high enough to deflect the proof mass to its extreme positive position, and this causes the output signal to go to the maximum value. the self test function is activated either by a separate on - off command on the self te st input, or through the spi. the self - test generates an electrostatic force, deflecting the sensing elements proof mass, thus checking the complete signal path. the true self test performs following checks: ? sensing element movement check ? asic signal pat h check ? pcb signal path check ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? lsb/g lsb lsb arcsin 0 @ sens d d out out ? free datasheet http:///
SCA103T series murata electronic s oy subject to changes 14 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 ? micro controller a/d and signal path check the created deflection can be seen both in the spi and analogue output. the self test function is activated digitally by a stx or sty command, and de - activated by a meas command. sel f test can be also activated applying logic1 (positive supply voltage level) to st pins (pins 9 & 10) of SCA103T. the self test input high voltage level is 4 C vdd+0.3 v and input low voltage level is 0.3 C 1 v. the self test function must not be activat ed for both channels at the same time . figure 12. self test wave forms self test characteristics: t1 [ms] t2 [ms] t3 [ms] t4 [ms] t5 [ms] v2: v3: 20 - 100 typ. 25 typ. 30 typ. 55 typ. 15 min 0.95*vdd (4.75v @vdd=5v) 0.95*v1 - 1.05*v1 v1 = init ial output voltage before the self test function is activated. v2 = output voltage during the self test function. v3 = output voltage after the self test function has been de - activated and after stabilization time please note that the error band specified for v3 is to guarantee that the output is within 5% of the initial value after the specified stabilization time. after a longer time (max. 1 second) v1=v3. t1 = pulse length for self test activation t2 = saturation delay t3 = recovery time t4 = stabiliza tion time =t2+t3 t5 = rise time during self test 2.7 temperature m easurement the SCA103T has an internal temperature sensor, which is used for internal offset compensation. the temperature information is also available for additional external compensation. th e temperature sensor can be accessed via the spi interface and the temperature reading is an 8 - bit word (0255). the transfer function is expressed by the following formula: where: counts temperature reading t temperature in c the temperatu re measurement output is not calibrated. the internal temperature compensation routine uses relative results where absolute accuracy is not needed. if the temperature measurement results are used for additional external compensation then one point calibrat ion in the system level is needed to remove the offset. with external one point calibration the accuracy of the temperature measurement is about 1 c. vout 5v 0 v t5 t1 t2 t3 t4 v1 v2 v3 st pin voltage 0 v 5 v 083 . 1 197 ? ? ? counts t free datasheet http:///
SCA103T series murata electronic s oy subject to changes 15 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 3 application information 3.1 recommended circuit d iagram s and printed circuit board l ayouts the SCA103T sho uld be powered from well regulated 5 v dc power supply. coupling of digital noise to power supply line should be minimized. a 100nf filtering capacitor between vdd pin 12 and gnd plane must be used. the SCA103T has ratiometric output. to achieve the best performance use the same reference voltage for both the SCA103T and analog/digital converter. use low pass rc filters with 5.11 k and 10nf on the SCA103T outputs to minimize clock noise. locate the 100nf power supply filtering capacitor close to vdd pin 12. use as short a trace length as possible. connect the other end of capacitor directly to the ground plane. connect the gnd pi n 6 to underlying ground plane. use as wide ground and power supply planes as possible. avoid narrow power supply or gnd connection strips on pcb. external instrumentation amplifier connection example is shown below. figure 13. differential ampli fier connection and layout example the recommended connection example for spi connection is shown below. figure 14. spi connection example free datasheet http:///
SCA103T series murata electronic s oy subject to changes 16 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 3.2 recommended printed circuit board f ootprint figure 15. recommended pcb footprint 4 mechanical s pecif ications and reflow s oldering 4.1 mechanical s pecifications (r eference only) lead frame material: copper plating: nickel followed by gold solderability: jedec standard: jesd22 - b102 - c rohs compliance: rohs compliant lead - free component. co - planarity error 0.1mm max. the part weights <1.2 g figure 16. mechanical dimensions of the SCA103T. (dimensions in mm) free datasheet http:///
SCA103T series murata electronic s oy subject to changes 17 / 17 www.muratamems .fi doc.nr. 8261700 rev.a 3 4.2 reflow s oldering the SCA103T is suitable for sn - pb eutectic and pb - free soldering process and mounting with normal smd pick - and - place equipment. figure 17. recommended SCA103T body temperature profile during reflow soldering. ref. ipc/jedec j - std - 020b. profile feature sn - pb eutectic assembly pb - free assembly average ramp - up rate (t l to t p ) 3c/second max. 3c/second max. preheat - temperat ure min (t smin ) - temperature max (t smax ) - time (min to max) (ts) 100c 150c 60 - 120 seconds 150c 200c 60 - 180 seconds tsmax to t, ramp up rate 3c/second max time maintained above: - temperature (t l ) - time (t l ) 183c 60 - 150 seconds 217c 60 - 150 seconds peak temperature (t p ) 240 +0/ - 5c 250 +0/ - 5c time within 5c of actual peak temperature (t p ) 10 - 30 seconds 20 - 40 seconds ramp - down rate 6c/second max 6c/second max time 25 to peak temperature 6 minutes max 8 minutes max the moisture sensitivity l evel of the part is 3 according to the ipc/jedec j - std - 020b. the part should be delivered in a dry pack. the manufacturing floor time (out of bag) in the customers end is 168 hours. notes: ? preheating time and temperatures according to solder paste manufa cturer. ? it is important that the part is parallel to the pcb plane and that there is no angular alignment error from intended measuring direction during the assembly process. ? wave soldering is not recommended. ? ultrasonic cleaning is not allowed . the sensi ng element may be damaged by an ultrasonic cleaning process. free datasheet http:///

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